Amazing Vim Verilog Editor Setup

From WICS
Revision as of 14:19, 20 May 2025 by Wics (talk | contribs) (1 revision imported)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to navigation Jump to search

Created May 2020 - Trevor

Why Do You Want This?

Have vim auto-declare regs/wire for you in Verilog to save you a lot of typing.
Reduce the tedium of writing Verilog by auto-generating testbenches quickly.
Go from module to testbench in 2 keystrokes!

How Does This Work?

Emacs has a plugin called verilog-mode that is very powerful. It can do many more things besides just generating testbenches. Read more about it here and here
Basically by inserting special comments and running a command, it will auto populate regs, wires, and instants for you without you having to manually type them.
You can also configure Vim to use some of these features using a plugin.
You do not need to know emacs for this to work in vim.

Installation Guide

Follow my guide on Github for no-install instructions: https://github.com/tjodelberg/verilog-mode-quickstart.

NOTE: The server you run on needs to have emacs installed. Only Clinton, Calhoun, Grandtraverse, and Hamilton do currently.