TSMC65
This is an attempt to provide some parameterization information:
Summary for TSMC65
Threshold Voltage = 0.25-0.3 V
FET Model Equations
Transconductance
Saturation
<math>g_m = \mu_n C_{ox} W/L (V_{GS} - V_{TH})\frac{}{}</math>
<math> g_m = \sqrt{2 \mu_n C_{ox} W/L I_D}</math>
<math>g_m \frac{2 I_D}{V_{GS} - V_{TH}}</math>
Linear
<math>g_m = \mu_n C_{ox} W/L V_{DS}\frac{}{}</math>
Subthreshold
<math>g_m = \frac{I_D}{\zeta V_T} </math>
where <math> \zeta > 1 \frac{}{}</math>
and <math> V_T \approx 25e-3 \frac{}{}</math> at room temperature (thermal voltage)
Subthreshold model derived from this equation:
<math> I_D = I_O e^{\frac{V_{GS}-V_{TH}}{\zeta V_T}} </math>
Threshold Voltage
gm vs. vds
Setup:
NFET
- Width = 1um
- Length = 120nm
- Number of Fingers = 1
VGS = 0.5 V (fixed)
Plot:
id vs. vds
NFET
- Width = 1um
- Length = 120nm
- Number of Fingers = 1
VGS = 0.5 (fixed)